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7 Commits (73a11f5c015dfce72e98c8aa37e3a9e514521c8a)

Author SHA1 Message Date
tevador 1945aae9f8 align -> balign
5 years ago
tevador 20eb549725 Merged load/store of integer and FP registers
6 years ago
tevador 005c67f64c Added explicit STORE instructions
6 years ago
tevador a7ffe8c19a Mix dataset cacheline with registers r0-r7
6 years ago
tevador 67e741ff22 Reduced x86 code size by 512 bytes (and ecx -> and eax)
6 years ago
tevador d1a808643d Random accesses - JIT compiler
6 years ago
tevador 3caecc7646 Vector FPU instructions
6 years ago