tevador
|
072130c774
|
ALU/FPU test: Fixed MSVC x86 build
|
6 years ago |
|
tevador
|
f19995d4c5
|
ALU and FPU tests
|
6 years ago |
|
tevador
|
1cc4fda4e7
|
Improved DRAM random access address space
|
6 years ago |
|
tevador
|
d3739015ea
|
Fixed random read frequency
|
6 years ago |
|
tevador
|
9ed71ae167
|
New DRAM reading pattern
New instruction weights
|
6 years ago |
|
tevador
|
58ae98c6a4
|
Fixed clang compilation
|
6 years ago |
|
tevador
|
df9180a30b
|
Performance benchmark for x86
|
6 years ago |
|
tevador
|
1ca1046c57
|
Fixed unaligned memory errors
|
6 years ago |
|
tevador
|
71bf9bd096
|
Fixed a possible type error in python
|
6 years ago |
|
tevador
|
8f3b145fe6
|
Added DRAM buffer option to rx2c
|
6 years ago |
|
tevador
|
2ea440d0f5
|
New instruction encoding
|
6 years ago |
|
tevador
|
cf59ced795
|
RandomX C generator
Updated specification
|
6 years ago |
|
tevador
|
5114d6b5fe
|
Updated specification
|
6 years ago |
|
tevador
|
d69d3d69a0
|
Fixed a bug in predictable branching
|
6 years ago |
|
tevador
|
8a81aa6453
|
Branch prediction test programs
|
6 years ago |
