f76e8c2e20
Reworked "FNEG" instruction to make ASIC optimizations more difficult
5 years ago
376c868ca0
Fixed wrong REX prefix in FDIV_M code
5 years ago
5a89c9b28e
Use allocExecutableMemory
5 years ago
0b1761a846
Refactoring: mining/verification mode
5 years ago
69764966c0
Position independent loads fixed #21
5 years ago
49581e503a
Merge pull request #20 from antanst/fix-uname
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Use portable uname flag, handle OpenBSD case of amd64
5 years ago
dd2c894d69
Use portable uname flag, handle OpenBSD case of amd64
5 years ago
e54697b952
Correct hashrate of i7-8550U with large pages
5 years ago
98c4ccf5ca
Merge branch 'dev'
5 years ago
85b31342e1
Removed old documentation
5 years ago
b8ce504be6
Added comments to hashAes1Rx4 and fillAes1Rx4
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Fixed gcc compilation
Added performance numbers
5 years ago
2798d78717
Render imm32 as signed in RandomX code
5 years ago
9af0cbf108
Documentation formatting
5 years ago
32d827d0a6
Interpreter with bytecode
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Fixed some undefined behavior with signed types
Fixed different results on big endian systems
Removed unused code files
Restored FNEG_R instructions
Updated documentation
5 years ago
a586751f6b
Removed FPNEG instruction
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Optimized instruction frequencies
Increased the range for A registers from [1,65536) to [1, 4294967296)
5 years ago
ac4462ad42
Renamed floating point instructions
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Fixed negative source operand for FMUL_M and FDIV_M
5 years ago
b417fd08ea
16 -> 8 chained programs
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constant address loads are always from L3
5 years ago
1ee94bef2a
Added ISWAP instruction
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Scratchpad -> 2 MiB
New scratchpad initialization
New dataset initialization
5 years ago
ab859879a2
loop body = 128 instructions
5 years ago
20eb549725
Merged load/store of integer and FP registers
5 years ago
8f2abd6c05
NOP instruction
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register load/store from L3
5 years ago
005c67f64c
Added explicit STORE instructions
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JIT compiler
5 years ago
7c049cce8d
Added store instructions
5 years ago
5b7df0c5e1
Test ASM for a new program structure
5 years ago
d2cb086221
ASM code generator for "small" programs that fit into the uOP cache
5 years ago
bd0dba88a8
4 scratchpad segments
5 years ago
16db607025
Scratchpad size increased to 1 MiB
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New AES-based scratchpad hashing function
5 years ago
93c324709b
Related to previous changes
5 years ago
89bc68d093
Memory-bound dataset initialization
5 years ago
4fb168e249
Large page support for cache
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Bug fixes
5 years ago
8b1102ee05
Interpreter + async mode
5 years ago
c2e0122e15
Comparison with CryptoNight
5 years ago
a7ffe8c19a
Mix dataset cacheline with registers r0-r7
5 years ago
48d85643de
Dataset intialization algorithm (AES)
5 years ago
67e741ff22
Reduced x86 code size by 512 bytes (and ecx -> and eax)
5 years ago
1426fcbab5
Print average program code size
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Fixed assembly for MUL_64 and IMUL_32
Division weight 4 -> 8
5 years ago
2756bcdcfe
Added magic division to JIT compiler
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New B operand selection rules
5 years ago
451dfc5730
Optimized division by constants
5 years ago
c02ee4291d
FPROUND - variable flag offset
5 years ago
e487092f07
Simplified CALL and RET
5 years ago
557241cd95
JUMP instruction
5 years ago
6941b2cb69
Reworked instruction set documentation
5 years ago
d1a808643d
Random accesses - JIT compiler
5 years ago
b71e0eec65
Optimizations to reduce code size under 32K
5 years ago
b6d654291f
90 address transformations
5 years ago
2f6a599ff6
Inlined calls for memory read
5 years ago
6519fed4d1
Combined prefetch + read into a single step
5 years ago
4189e4ebc6
Original number of VM instructions
5 years ago
619bee5418
Random dataset accesses - asm only
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Initial support for large pages
5 years ago
bf8397b08d
Updated specification
5 years ago
tevador
tevador
Antonis Anastasiadis