26 Commits (0.3.0-beta)

Author	SHA1	Message	Date
tevador	f76e8c2e20	Reworked "FNEG" instruction to make ASIC optimizations more difficult	5 years ago
tevador	2798d78717	Render imm32 as signed in RandomX code	5 years ago
tevador	32d827d0a6	Interpreter with bytecode ... Fixed some undefined behavior with signed types Fixed different results on big endian systems Removed unused code files Restored FNEG_R instructions Updated documentation	5 years ago
tevador	a586751f6b	Removed FPNEG instruction ... Optimized instruction frequencies Increased the range for A registers from [1,65536) to [1, 4294967296)	5 years ago
tevador	b417fd08ea	16 -> 8 chained programs ... constant address loads are always from L3	5 years ago
tevador	8f2abd6c05	NOP instruction ... register load/store from L3	5 years ago
tevador	005c67f64c	Added explicit STORE instructions ... JIT compiler	5 years ago
tevador	d2cb086221	ASM code generator for "small" programs that fit into the uOP cache	5 years ago
tevador	16db607025	Scratchpad size increased to 1 MiB ... New AES-based scratchpad hashing function	5 years ago
tevador	93c324709b	Related to previous changes	5 years ago
tevador	a7ffe8c19a	Mix dataset cacheline with registers r0-r7	5 years ago
tevador	67e741ff22	Reduced x86 code size by 512 bytes (and ecx -> and eax)	5 years ago
tevador	1426fcbab5	Print average program code size ... Fixed assembly for MUL_64 and IMUL_32 Division weight 4 -> 8	5 years ago
tevador	2756bcdcfe	Added magic division to JIT compiler ... New B operand selection rules	5 years ago
tevador	c02ee4291d	FPROUND - variable flag offset	5 years ago
tevador	e487092f07	Simplified CALL and RET	5 years ago
tevador	557241cd95	JUMP instruction	5 years ago
tevador	d1a808643d	Random accesses - JIT compiler	5 years ago
tevador	b71e0eec65	Optimizations to reduce code size under 32K	5 years ago
tevador	2f6a599ff6	Inlined calls for memory read	5 years ago
tevador	619bee5418	Random dataset accesses - asm only ... Initial support for large pages	5 years ago
tevador	3caecc7646	Vector FPU instructions ... JitCompilerX86 - static code written in asm Updated ALU/FPU tests Updated instruction weights	5 years ago
tevador	740c40b218	8 branch conditions for CALL/RET	6 years ago
tevador	4f276541d2	Modified x86 register allocation	6 years ago
tevador	6332831ec1	Implemented cache shift ... Fixed assembly code generator Fixed an error in the interpreter Updated specification: sign-extended immediates	6 years ago
tevador	cb0721056a	Assembly code generator for Windows 64-bit	6 years ago