SChernykh
|
702a4bb0b5
|
Enabled FSWAP_R instruction
|
5 years ago |
|
SChernykh
|
afa148458a
|
Enabled CBRANCH instruction
|
5 years ago |
|
SChernykh
|
6992e4d938
|
Enabled ISTORE instruction
|
5 years ago |
|
SChernykh
|
3ee927e942
|
Enabled integer instructions
|
5 years ago |
|
SChernykh
|
30f33e158a
|
Enabled IMUL_M instruction
|
5 years ago |
|
SChernykh
|
2b48ab0e46
|
Enabled IADD_M, ISUB_R, ISUB_M, IMUL_R instructions
|
5 years ago |
|
SChernykh
|
9de18baef8
|
Enabled IADD_RS instruction
|
5 years ago |
|
SChernykh
|
07b35b1aeb
|
Disabled all instructions
|
5 years ago |
tevador
|
2706a8b753
|
Relicensed under the 3-clause BSD license
|
5 years ago |
|
tevador
|
c1314dc2a2
|
Use values from configuration.h in assembly code
|
5 years ago |
|
tevador
|
9e5eac8645
|
Fixed a chance of CBRANCH looping
Fixed CBRANCH jump probability being lower than expected
|
5 years ago |
|
tevador
|
be21ba767c
|
Doubled the frequency of CBRANCH, halved the jumping probability
|
5 years ago |
|
tevador
|
ffebc37381
|
COND_R instruction reworked as CBRANCH
instruction mod field bits reallocated
|
5 years ago |
|
tevador
|
7f6bdd9a52
|
Code cleanup & refactoring
|
5 years ago |
|
tevador
|
fd7186f873
|
Changed IADD_RS to use mod.mem
|
5 years ago |
|
tevador
|
270a4f97fe
|
Dataset size increased to 2080 MiB
Implemented dataset base offset
Tweaked SuperscalarHash constants to prevent register collisions
|
5 years ago |
|
tevador
|
f66da3911e
|
Fixed some compilation issues
Code cleanup
|
5 years ago |
|
tevador
|
4c66b2305a
|
Formatting & refactoring
|
5 years ago |
|
tevador
|
41b51a4858
|
Cleaned up legacy code
|
5 years ago |
|
tevador
|
682000b1a9
|
Unique scratchpad addresses - interpreter
Additional writes to L3
|
5 years ago |
|
tevador
|
24a22c6b54
|
Code generator refactoring
|
5 years ago |
|
tevador
|
6e3136b37f
|
Fixed cache alignment
Performance tuning
|
5 years ago |
|
tevador
|
77dbe14658
|
SuperscalarHash JIT compiler
(unfinished)
|
5 years ago |
|
tevador
|
59bbb572c2
|
WIP
|
5 years ago |
|
tevador
|
2bb42637fd
|
Epoch increased to 2048 blocks
|
5 years ago |
|
tevador
|
107270d93d
|
Reduced Dataset size to 2 GiB with 8 memory accesses per block
Disabled Dataset growth
|
5 years ago |
|
tevador
|
174754cb2b
|
Added branches - ASM and JIT only
|
5 years ago |
|
tevador
|
a1dc094c19
|
added epoch lag configuration
|
5 years ago |
|
tevador
|
2edf05cedc
|
Implemented Dataset size increase per epoch
|
5 years ago |
|
tevador
|
e65d9da66c
|
Configurable parameters separated into configuration.h
|
5 years ago |
