SChernykh
9d13ee1e73
Merge remote-tracking branch 'upstream/master' into armv8-a-jit
5 years ago
SChernykh
eb6f0f0e73
Fixed comment
5 years ago
SChernykh
5a48262d22
Fixed calculation of CalcDatasetItemSize
5 years ago
SChernykh
5e3111d8c9
Fix compiler warning
5 years ago
SChernykh
258fa170fe
Code cleanup
5 years ago
SChernykh
ffdeca4f67
Code cleanup
5 years ago
tevador
5fb26fc607
Merge pull request #124 from SChernykh/master
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Optimized loading from scratchpad
5 years ago
SChernykh
7fb5cfdfce
Added light mode
5 years ago
SChernykh
cb43ef96e2
Fixed dataset initialization
5 years ago
SChernykh
fe738ef7a4
Fixed dataset pointer in initDataset()
5 years ago
SChernykh
54baf2c8c9
Added initDataset()
5 years ago
SChernykh
8f42844893
Added generateSuperscalarHash()
5 years ago
SChernykh
1e8b83bf67
Update jit_compiler_a64_static.S
5 years ago
SChernykh
f4201b9d3d
SuperscalarHash (WIP)
5 years ago
SChernykh
d991de4f79
Store 32-bit literals in unused SIMD registers
5 years ago
SChernykh
985db549d9
Load dataset in smaller chunks
5 years ago
SChernykh
78158b6020
Use posix_memalign for ARM
5 years ago
SChernykh
0422c61db0
Added CBRANCH
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Also optimized register allocation
5 years ago
SChernykh
3a6993290c
Added CFROUND
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Also optimized register allocation
5 years ago
SChernykh
e49499043c
Added FP instructions
5 years ago
SChernykh
a6b79dd3aa
Added integer instructions
5 years ago
SChernykh
e6065a95e9
Added ISUB_R instruction
5 years ago
SChernykh
3a1c58946d
Added IADD_M instruction
5 years ago
SChernykh
228e718c04
ARMv8-a JIT (work in progress)
5 years ago
SChernykh
93fec18991
Optimized loading from scratchpad
5 years ago
Jethro Grassie
73021b89e0
fix MSYS thread handle cast
5 years ago
tevador
f1ff014bca
Fix JIT fallback
5 years ago
tevador
bd8ef0375a
Update benchmark
5 years ago
tevador
eee355d85b
Fixed tests
5 years ago
tevador
22689eda49
Increase the frequency of CBRANCH ( #118 )
5 years ago
tevador
67010ab554
Optional W^X policy for JIT pages ( #112 )
5 years ago
tevador
971f10c9c2
Changes recommended by Quarkslab ( #111 )
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* Corrected bounds for some configuration parameters
* Clarifications in the specification
* Check validity of Argon2 parameters
5 years ago
tevador
91f3edb5eb
Fix use-after-free in benchmark (debug build)
5 years ago
Caleb James DeLisle
058735e508
Fix a compiler error on Apple OSX because the assembly is not understood
5 years ago
tevador
c433f6d3a8
Fix: hardcoded JIT code buffer size ( #98 )
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* code buffer size is calculated based on RandomX parameters
* added a maximum value constraint for program size and superscalar latency
* reduced the x86 code size of memory instructions by 1 byte
* disclaimer note in configuration documentation
5 years ago
tevador
47ade5e894
Do not attempt to allocate >= 4 GiB on 32-bit systems ( #99 )
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+ Cache size limited to 2 GiB
5 years ago
Jethro Grassie
41401797c9
benchmark: affinity cast for mingw ( #96 )
5 years ago
tevador
89aba80925
Refactoring ( #95 )
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* Blake2Generator::getInt32 renamed to getUInt32 to avoid confusion
* isPowerOf2 renamed to isZeroOrPowerOf2 to avoid confusion
* added asserts to validate the input/output size of AES functions
* fixed possible overflow in JitCompilerX86::getCodeSize (unused function)
5 years ago
tevador
08f7a2c2f2
Vector intrinsics for ARMv8 ( #93 )
5 years ago
tevador
aaa6e4e881
Sanity checks ( #88 )
5 years ago
tevador
c6b5ec12b6
Fix: possible overflow when using non-standard Dataset size ( #87 )
5 years ago
tevador
b91882be42
Use cmake for building ( #90 )
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* Use cmake for building
* CMakeLists.txt modified to support full standalone build
* added support for ARCH=native builds
* added PowerPC flags
* added ARMv8 flags
* check for x86 AES-NI at compile time
5 years ago
tevador
4a4b06e44b
More helpful error messages in the benchmark
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Move reciprocal tests before Dataset initialization
Fix randomx.dll project
5 years ago
tevador
6ea6cceb63
Fix undefined behavior in rotr/rotl ( #86 )
5 years ago
tevador
1f62d787ad
Fix header dependency of superscalar_program.hpp
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Fix tests
Fix a typo in design.md
5 years ago
tevador
e6ba0a1b7d
Code generator fixups
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- fixed a crash in Instruction::print
- new example program
- added a design note about the number of x86 instruction per VM instruction
5 years ago
tevador
77f809e8db
Merge branch 'jtgrassie-affinity'
5 years ago
tevador
e8cf27eab5
Fixed Visual Studio build
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Moved affinity to tests
Fixed strange output from mask_to_string
5 years ago
tevador
8282413154
Updated documentation and test vectors
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Added AesGenerator1R test
Added benchmark hints if large pages fail
5 years ago
tevador
91cd35ff13
Decrease the frequency of FADD/FSUB in favor of FMUL ( #77 )
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* this better matches CPU capabilities since execution ports are usually split 1:1 between fadd and fmul
* the frequency of FSWAP_R decreased from 8 to 4 (it's ASIC-friendly)
* activate IROL_R instruction
5 years ago