Regression tests (#73)
* instruction decode/execute separated into class BytecodeMachine * added randomx-tests project * removed the use of non-portable __COUNTER__ macro * removed the use of unsupported FENV_ACCESS pragmafeature/configurable
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07293a9378
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/*
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Copyright (c) 2019, tevador <tevador@gmail.com>
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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* Neither the name of the copyright holder nor the
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names of its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "bytecode_machine.hpp"
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#include "reciprocal.h"
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namespace randomx {
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const int_reg_t BytecodeMachine::zero = 0;
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#define INSTR_CASE(x) case InstructionType::x: \
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exe_ ## x(ibc, pc, scratchpad, config); \
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break;
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void BytecodeMachine::executeInstruction(RANDOMX_EXE_ARGS) {
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switch (ibc.type)
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{
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INSTR_CASE(IADD_RS)
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INSTR_CASE(IADD_M)
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INSTR_CASE(ISUB_R)
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INSTR_CASE(ISUB_M)
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INSTR_CASE(IMUL_R)
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INSTR_CASE(IMUL_M)
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INSTR_CASE(IMULH_R)
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INSTR_CASE(IMULH_M)
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INSTR_CASE(ISMULH_R)
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INSTR_CASE(ISMULH_M)
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INSTR_CASE(INEG_R)
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INSTR_CASE(IXOR_R)
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INSTR_CASE(IXOR_M)
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INSTR_CASE(IROR_R)
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INSTR_CASE(IROL_R)
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INSTR_CASE(ISWAP_R)
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INSTR_CASE(FSWAP_R)
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INSTR_CASE(FADD_R)
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INSTR_CASE(FADD_M)
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INSTR_CASE(FSUB_R)
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INSTR_CASE(FSUB_M)
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INSTR_CASE(FSCAL_R)
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INSTR_CASE(FMUL_R)
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INSTR_CASE(FDIV_M)
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INSTR_CASE(FSQRT_R)
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INSTR_CASE(CBRANCH)
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INSTR_CASE(CFROUND)
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INSTR_CASE(ISTORE)
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case InstructionType::NOP:
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break;
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case InstructionType::IMUL_RCP: //executed as IMUL_R
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default:
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UNREACHABLE;
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}
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}
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void BytecodeMachine::compileInstruction(RANDOMX_GEN_ARGS) {
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int opcode = instr.opcode;
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if (opcode < ceil_IADD_RS) {
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auto dst = instr.dst % RegistersCount;
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::IADD_RS;
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ibc.idst = &nreg->r[dst];
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if (dst != RegisterNeedsDisplacement) {
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ibc.isrc = &nreg->r[src];
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ibc.shift = instr.getModShift();
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ibc.imm = 0;
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}
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else {
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ibc.isrc = &nreg->r[src];
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ibc.shift = instr.getModShift();
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ibc.imm = signExtend2sCompl(instr.getImm32());
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}
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registerUsage[dst] = i;
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return;
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}
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if (opcode < ceil_IADD_M) {
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auto dst = instr.dst % RegistersCount;
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::IADD_M;
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ibc.idst = &nreg->r[dst];
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ibc.imm = signExtend2sCompl(instr.getImm32());
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if (src != dst) {
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ibc.isrc = &nreg->r[src];
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ibc.memMask = (instr.getModMem() ? ScratchpadL1Mask : ScratchpadL2Mask);
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}
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else {
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ibc.isrc = &zero;
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ibc.memMask = ScratchpadL3Mask;
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}
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registerUsage[dst] = i;
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return;
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}
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if (opcode < ceil_ISUB_R) {
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auto dst = instr.dst % RegistersCount;
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::ISUB_R;
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ibc.idst = &nreg->r[dst];
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if (src != dst) {
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ibc.isrc = &nreg->r[src];
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}
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else {
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ibc.imm = signExtend2sCompl(instr.getImm32());
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ibc.isrc = &ibc.imm;
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}
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registerUsage[dst] = i;
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return;
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}
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if (opcode < ceil_ISUB_M) {
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auto dst = instr.dst % RegistersCount;
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::ISUB_M;
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ibc.idst = &nreg->r[dst];
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ibc.imm = signExtend2sCompl(instr.getImm32());
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if (src != dst) {
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ibc.isrc = &nreg->r[src];
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ibc.memMask = (instr.getModMem() ? ScratchpadL1Mask : ScratchpadL2Mask);
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}
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else {
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ibc.isrc = &zero;
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ibc.memMask = ScratchpadL3Mask;
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}
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registerUsage[dst] = i;
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return;
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}
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if (opcode < ceil_IMUL_R) {
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auto dst = instr.dst % RegistersCount;
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::IMUL_R;
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ibc.idst = &nreg->r[dst];
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if (src != dst) {
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ibc.isrc = &nreg->r[src];
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}
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else {
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ibc.imm = signExtend2sCompl(instr.getImm32());
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ibc.isrc = &ibc.imm;
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}
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registerUsage[dst] = i;
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return;
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}
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if (opcode < ceil_IMUL_M) {
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auto dst = instr.dst % RegistersCount;
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::IMUL_M;
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ibc.idst = &nreg->r[dst];
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ibc.imm = signExtend2sCompl(instr.getImm32());
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if (src != dst) {
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ibc.isrc = &nreg->r[src];
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ibc.memMask = (instr.getModMem() ? ScratchpadL1Mask : ScratchpadL2Mask);
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}
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else {
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ibc.isrc = &zero;
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ibc.memMask = ScratchpadL3Mask;
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}
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registerUsage[dst] = i;
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return;
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}
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if (opcode < ceil_IMULH_R) {
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auto dst = instr.dst % RegistersCount;
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::IMULH_R;
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ibc.idst = &nreg->r[dst];
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ibc.isrc = &nreg->r[src];
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registerUsage[dst] = i;
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return;
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}
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if (opcode < ceil_IMULH_M) {
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auto dst = instr.dst % RegistersCount;
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::IMULH_M;
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ibc.idst = &nreg->r[dst];
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ibc.imm = signExtend2sCompl(instr.getImm32());
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if (src != dst) {
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ibc.isrc = &nreg->r[src];
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ibc.memMask = (instr.getModMem() ? ScratchpadL1Mask : ScratchpadL2Mask);
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}
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else {
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ibc.isrc = &zero;
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ibc.memMask = ScratchpadL3Mask;
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}
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registerUsage[dst] = i;
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return;
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}
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if (opcode < ceil_ISMULH_R) {
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auto dst = instr.dst % RegistersCount;
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::ISMULH_R;
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ibc.idst = &nreg->r[dst];
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ibc.isrc = &nreg->r[src];
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registerUsage[dst] = i;
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return;
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}
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if (opcode < ceil_ISMULH_M) {
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auto dst = instr.dst % RegistersCount;
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::ISMULH_M;
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ibc.idst = &nreg->r[dst];
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ibc.imm = signExtend2sCompl(instr.getImm32());
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if (src != dst) {
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ibc.isrc = &nreg->r[src];
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ibc.memMask = (instr.getModMem() ? ScratchpadL1Mask : ScratchpadL2Mask);
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}
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else {
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ibc.isrc = &zero;
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ibc.memMask = ScratchpadL3Mask;
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}
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registerUsage[dst] = i;
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return;
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}
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if (opcode < ceil_IMUL_RCP) {
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uint64_t divisor = instr.getImm32();
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if (!isPowerOf2(divisor)) {
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auto dst = instr.dst % RegistersCount;
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ibc.type = InstructionType::IMUL_R;
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ibc.idst = &nreg->r[dst];
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ibc.imm = randomx_reciprocal(divisor);
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ibc.isrc = &ibc.imm;
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registerUsage[dst] = i;
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}
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else {
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ibc.type = InstructionType::NOP;
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}
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return;
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}
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if (opcode < ceil_INEG_R) {
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auto dst = instr.dst % RegistersCount;
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ibc.type = InstructionType::INEG_R;
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ibc.idst = &nreg->r[dst];
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registerUsage[dst] = i;
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return;
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}
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if (opcode < ceil_IXOR_R) {
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auto dst = instr.dst % RegistersCount;
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::IXOR_R;
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ibc.idst = &nreg->r[dst];
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if (src != dst) {
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ibc.isrc = &nreg->r[src];
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}
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else {
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ibc.imm = signExtend2sCompl(instr.getImm32());
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ibc.isrc = &ibc.imm;
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}
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registerUsage[dst] = i;
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return;
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}
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if (opcode < ceil_IXOR_M) {
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auto dst = instr.dst % RegistersCount;
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::IXOR_M;
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ibc.idst = &nreg->r[dst];
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ibc.imm = signExtend2sCompl(instr.getImm32());
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if (src != dst) {
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ibc.isrc = &nreg->r[src];
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ibc.memMask = (instr.getModMem() ? ScratchpadL1Mask : ScratchpadL2Mask);
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}
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else {
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ibc.isrc = &zero;
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ibc.memMask = ScratchpadL3Mask;
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}
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registerUsage[dst] = i;
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return;
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}
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if (opcode < ceil_IROR_R) {
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auto dst = instr.dst % RegistersCount;
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::IROR_R;
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ibc.idst = &nreg->r[dst];
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if (src != dst) {
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ibc.isrc = &nreg->r[src];
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}
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else {
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ibc.imm = instr.getImm32();
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ibc.isrc = &ibc.imm;
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}
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registerUsage[dst] = i;
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return;
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}
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if (opcode < ceil_IROL_R) {
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auto dst = instr.dst % RegistersCount;
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::IROL_R;
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ibc.idst = &nreg->r[dst];
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if (src != dst) {
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ibc.isrc = &nreg->r[src];
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}
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else {
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ibc.imm = instr.getImm32();
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ibc.isrc = &ibc.imm;
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}
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registerUsage[dst] = i;
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return;
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}
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if (opcode < ceil_ISWAP_R) {
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auto dst = instr.dst % RegistersCount;
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auto src = instr.src % RegistersCount;
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if (src != dst) {
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ibc.idst = &nreg->r[dst];
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ibc.isrc = &nreg->r[src];
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ibc.type = InstructionType::ISWAP_R;
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registerUsage[dst] = i;
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registerUsage[src] = i;
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}
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else {
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ibc.type = InstructionType::NOP;
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}
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return;
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}
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if (opcode < ceil_FSWAP_R) {
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auto dst = instr.dst % RegistersCount;
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ibc.type = InstructionType::FSWAP_R;
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if (dst < RegisterCountFlt)
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ibc.fdst = &nreg->f[dst];
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else
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ibc.fdst = &nreg->e[dst - RegisterCountFlt];
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return;
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}
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if (opcode < ceil_FADD_R) {
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auto dst = instr.dst % RegisterCountFlt;
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auto src = instr.src % RegisterCountFlt;
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ibc.type = InstructionType::FADD_R;
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ibc.fdst = &nreg->f[dst];
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ibc.fsrc = &nreg->a[src];
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return;
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}
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if (opcode < ceil_FADD_M) {
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auto dst = instr.dst % RegisterCountFlt;
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::FADD_M;
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ibc.fdst = &nreg->f[dst];
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ibc.isrc = &nreg->r[src];
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ibc.memMask = (instr.getModMem() ? ScratchpadL1Mask : ScratchpadL2Mask);
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ibc.imm = signExtend2sCompl(instr.getImm32());
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return;
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}
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if (opcode < ceil_FSUB_R) {
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auto dst = instr.dst % RegisterCountFlt;
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auto src = instr.src % RegisterCountFlt;
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ibc.type = InstructionType::FSUB_R;
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ibc.fdst = &nreg->f[dst];
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ibc.fsrc = &nreg->a[src];
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return;
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}
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if (opcode < ceil_FSUB_M) {
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auto dst = instr.dst % RegisterCountFlt;
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::FSUB_M;
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ibc.fdst = &nreg->f[dst];
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ibc.isrc = &nreg->r[src];
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ibc.memMask = (instr.getModMem() ? ScratchpadL1Mask : ScratchpadL2Mask);
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ibc.imm = signExtend2sCompl(instr.getImm32());
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return;
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}
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if (opcode < ceil_FSCAL_R) {
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auto dst = instr.dst % RegisterCountFlt;
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ibc.fdst = &nreg->f[dst];
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ibc.type = InstructionType::FSCAL_R;
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return;
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}
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if (opcode < ceil_FMUL_R) {
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auto dst = instr.dst % RegisterCountFlt;
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auto src = instr.src % RegisterCountFlt;
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ibc.type = InstructionType::FMUL_R;
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ibc.fdst = &nreg->e[dst];
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ibc.fsrc = &nreg->a[src];
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return;
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}
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if (opcode < ceil_FDIV_M) {
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auto dst = instr.dst % RegisterCountFlt;
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auto src = instr.src % RegistersCount;
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ibc.type = InstructionType::FDIV_M;
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ibc.fdst = &nreg->e[dst];
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ibc.isrc = &nreg->r[src];
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ibc.memMask = (instr.getModMem() ? ScratchpadL1Mask : ScratchpadL2Mask);
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ibc.imm = signExtend2sCompl(instr.getImm32());
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return;
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}
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if (opcode < ceil_FSQRT_R) {
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auto dst = instr.dst % RegisterCountFlt;
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ibc.type = InstructionType::FSQRT_R;
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ibc.fdst = &nreg->e[dst];
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return;
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}
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if (opcode < ceil_CBRANCH) {
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ibc.type = InstructionType::CBRANCH;
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//jump condition
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int creg = instr.dst % RegistersCount;
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ibc.idst = &nreg->r[creg];
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ibc.target = registerUsage[creg];
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int shift = instr.getModCond() + ConditionOffset;
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ibc.imm = signExtend2sCompl(instr.getImm32()) | (1ULL << shift);
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if (ConditionOffset > 0 || shift > 0) //clear the bit below the condition mask - this limits the number of successive jumps to 2
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ibc.imm &= ~(1ULL << (shift - 1));
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ibc.memMask = ConditionMask << shift;
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//mark all registers as used
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for (unsigned j = 0; j < RegistersCount; ++j) {
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registerUsage[j] = i;
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}
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return;
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}
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if (opcode < ceil_CFROUND) {
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auto src = instr.src % RegistersCount;
|
||||
ibc.isrc = &nreg->r[src];
|
||||
ibc.type = InstructionType::CFROUND;
|
||||
ibc.imm = instr.getImm32() & 63;
|
||||
return;
|
||||
}
|
||||
|
||||
if (opcode < ceil_ISTORE) {
|
||||
auto dst = instr.dst % RegistersCount;
|
||||
auto src = instr.src % RegistersCount;
|
||||
ibc.type = InstructionType::ISTORE;
|
||||
ibc.idst = &nreg->r[dst];
|
||||
ibc.isrc = &nreg->r[src];
|
||||
ibc.imm = signExtend2sCompl(instr.getImm32());
|
||||
if (instr.getModCond() < StoreL3Condition)
|
||||
ibc.memMask = (instr.getModMem() ? ScratchpadL1Mask : ScratchpadL2Mask);
|
||||
else
|
||||
ibc.memMask = ScratchpadL3Mask;
|
||||
return;
|
||||
}
|
||||
|
||||
if (opcode < ceil_NOP) {
|
||||
ibc.type = InstructionType::NOP;
|
||||
return;
|
||||
}
|
||||
|
||||
UNREACHABLE;
|
||||
}
|
||||
}
|
@ -0,0 +1,322 @@
|
||||
/*
|
||||
Copyright (c) 2019, tevador <tevador@gmail.com>
|
||||
|
||||
All rights reserved.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
* Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
* Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
* Neither the name of the copyright holder nor the
|
||||
names of its contributors may be used to endorse or promote products
|
||||
derived from this software without specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "common.hpp"
|
||||
#include "intrin_portable.h"
|
||||
#include "instruction.hpp"
|
||||
#include "program.hpp"
|
||||
|
||||
namespace randomx {
|
||||
|
||||
//register file in machine byte order
|
||||
struct NativeRegisterFile {
|
||||
int_reg_t r[RegistersCount] = { 0 };
|
||||
rx_vec_f128 f[RegisterCountFlt];
|
||||
rx_vec_f128 e[RegisterCountFlt];
|
||||
rx_vec_f128 a[RegisterCountFlt];
|
||||
};
|
||||
|
||||
struct InstructionByteCode {
|
||||
union {
|
||||
int_reg_t* idst;
|
||||
rx_vec_f128* fdst;
|
||||
};
|
||||
union {
|
||||
const int_reg_t* isrc;
|
||||
const rx_vec_f128* fsrc;
|
||||
};
|
||||
union {
|
||||
uint64_t imm;
|
||||
int64_t simm;
|
||||
};
|
||||
InstructionType type;
|
||||
union {
|
||||
int16_t target;
|
||||
uint16_t shift;
|
||||
};
|
||||
uint32_t memMask;
|
||||
};
|
||||
|
||||
#define OPCODE_CEIL_DECLARE(curr, prev) constexpr int ceil_ ## curr = ceil_ ## prev + RANDOMX_FREQ_ ## curr;
|
||||
constexpr int ceil_NULL = 0;
|
||||
OPCODE_CEIL_DECLARE(IADD_RS, NULL);
|
||||
OPCODE_CEIL_DECLARE(IADD_M, IADD_RS);
|
||||
OPCODE_CEIL_DECLARE(ISUB_R, IADD_M);
|
||||
OPCODE_CEIL_DECLARE(ISUB_M, ISUB_R);
|
||||
OPCODE_CEIL_DECLARE(IMUL_R, ISUB_M);
|
||||
OPCODE_CEIL_DECLARE(IMUL_M, IMUL_R);
|
||||
OPCODE_CEIL_DECLARE(IMULH_R, IMUL_M);
|
||||
OPCODE_CEIL_DECLARE(IMULH_M, IMULH_R);
|
||||
OPCODE_CEIL_DECLARE(ISMULH_R, IMULH_M);
|
||||
OPCODE_CEIL_DECLARE(ISMULH_M, ISMULH_R);
|
||||
OPCODE_CEIL_DECLARE(IMUL_RCP, ISMULH_M);
|
||||
OPCODE_CEIL_DECLARE(INEG_R, IMUL_RCP);
|
||||
OPCODE_CEIL_DECLARE(IXOR_R, INEG_R);
|
||||
OPCODE_CEIL_DECLARE(IXOR_M, IXOR_R);
|
||||
OPCODE_CEIL_DECLARE(IROR_R, IXOR_M);
|
||||
OPCODE_CEIL_DECLARE(IROL_R, IROR_R);
|
||||
OPCODE_CEIL_DECLARE(ISWAP_R, IROL_R);
|
||||
OPCODE_CEIL_DECLARE(FSWAP_R, ISWAP_R);
|
||||
OPCODE_CEIL_DECLARE(FADD_R, FSWAP_R);
|
||||
OPCODE_CEIL_DECLARE(FADD_M, FADD_R);
|
||||
OPCODE_CEIL_DECLARE(FSUB_R, FADD_M);
|
||||
OPCODE_CEIL_DECLARE(FSUB_M, FSUB_R);
|
||||
OPCODE_CEIL_DECLARE(FSCAL_R, FSUB_M);
|
||||
OPCODE_CEIL_DECLARE(FMUL_R, FSCAL_R);
|
||||
OPCODE_CEIL_DECLARE(FDIV_M, FMUL_R);
|
||||
OPCODE_CEIL_DECLARE(FSQRT_R, FDIV_M);
|
||||
OPCODE_CEIL_DECLARE(CBRANCH, FSQRT_R);
|
||||
OPCODE_CEIL_DECLARE(CFROUND, CBRANCH);
|
||||
OPCODE_CEIL_DECLARE(ISTORE, CFROUND);
|
||||
OPCODE_CEIL_DECLARE(NOP, ISTORE);
|
||||
#undef OPCODE_CEIL_DECLARE
|
||||
|
||||
#define RANDOMX_EXE_ARGS InstructionByteCode& ibc, int& pc, uint8_t* scratchpad, ProgramConfiguration& config
|
||||
#define RANDOMX_GEN_ARGS Instruction& instr, int i, InstructionByteCode& ibc
|
||||
|
||||
class BytecodeMachine;
|
||||
|
||||
typedef void(BytecodeMachine::*InstructionGenBytecode)(RANDOMX_GEN_ARGS);
|
||||
|
||||
class BytecodeMachine {
|
||||
public:
|
||||
void beginCompilation(NativeRegisterFile& regFile) {
|
||||
for (unsigned i = 0; i < RegistersCount; ++i) {
|
||||
registerUsage[i] = -1;
|
||||
}
|
||||
nreg = ®File;
|
||||
}
|
||||
|
||||
void compileProgram(Program& program, InstructionByteCode bytecode[RANDOMX_PROGRAM_SIZE], NativeRegisterFile& regFile) {
|
||||
beginCompilation(regFile);
|
||||
for (unsigned i = 0; i < RANDOMX_PROGRAM_SIZE; ++i) {
|
||||
auto& instr = program(i);
|
||||
auto& ibc = bytecode[i];
|
||||
compileInstruction(instr, i, ibc);
|
||||
}
|
||||
}
|
||||
|
||||
static void executeBytecode(InstructionByteCode bytecode[RANDOMX_PROGRAM_SIZE], uint8_t* scratchpad, ProgramConfiguration& config) {
|
||||
for (int pc = 0; pc < RANDOMX_PROGRAM_SIZE; ++pc) {
|
||||
auto& ibc = bytecode[pc];
|
||||
executeInstruction(ibc, pc, scratchpad, config);
|
||||
}
|
||||
}
|
||||
|
||||
void compileInstruction(RANDOMX_GEN_ARGS)
|
||||
#ifdef RANDOMX_GEN_TABLE
|
||||
{
|
||||
auto generator = genTable[instr.opcode];
|
||||
(this->*generator)(instr, i, ibc);
|
||||
}
|
||||
#else
|
||||
;
|
||||
#endif
|
||||
|
||||
static void executeInstruction(RANDOMX_EXE_ARGS);
|
||||
|
||||
static void exe_IADD_RS(RANDOMX_EXE_ARGS) {
|
||||
*ibc.idst += (*ibc.isrc << ibc.shift) + ibc.imm;
|
||||
}
|
||||
|
||||
static void exe_IADD_M(RANDOMX_EXE_ARGS) {
|
||||
*ibc.idst += load64(getScratchpadAddress(ibc, scratchpad));
|
||||
}
|
||||
|
||||
static void exe_ISUB_R(RANDOMX_EXE_ARGS) {
|
||||
*ibc.idst -= *ibc.isrc;
|
||||
}
|
||||
|
||||
static void exe_ISUB_M(RANDOMX_EXE_ARGS) {
|
||||
*ibc.idst -= load64(getScratchpadAddress(ibc, scratchpad));
|
||||
}
|
||||
|
||||
static void exe_IMUL_R(RANDOMX_EXE_ARGS) {
|
||||
*ibc.idst *= *ibc.isrc;
|
||||
}
|
||||
|
||||
static void exe_IMUL_M(RANDOMX_EXE_ARGS) {
|
||||
*ibc.idst *= load64(getScratchpadAddress(ibc, scratchpad));
|
||||
}
|
||||
|
||||
static void exe_IMULH_R(RANDOMX_EXE_ARGS) {
|
||||
*ibc.idst = mulh(*ibc.idst, *ibc.isrc);
|
||||
}
|
||||
|
||||
static void exe_IMULH_M(RANDOMX_EXE_ARGS) {
|
||||
*ibc.idst = mulh(*ibc.idst, load64(getScratchpadAddress(ibc, scratchpad)));
|
||||
}
|
||||
|
||||
static void exe_ISMULH_R(RANDOMX_EXE_ARGS) {
|
||||
*ibc.idst = smulh(unsigned64ToSigned2sCompl(*ibc.idst), unsigned64ToSigned2sCompl(*ibc.isrc));
|
||||
}
|
||||
|
||||
static void exe_ISMULH_M(RANDOMX_EXE_ARGS) {
|
||||
*ibc.idst = smulh(unsigned64ToSigned2sCompl(*ibc.idst), unsigned64ToSigned2sCompl(load64(getScratchpadAddress(ibc, scratchpad))));
|
||||
}
|
||||
|
||||
static void exe_INEG_R(RANDOMX_EXE_ARGS) {
|
||||
*ibc.idst = ~(*ibc.idst) + 1; //two's complement negative
|
||||
}
|
||||
|
||||
static void exe_IXOR_R(RANDOMX_EXE_ARGS) {
|
||||
*ibc.idst ^= *ibc.isrc;
|
||||
}
|
||||
|
||||
static void exe_IXOR_M(RANDOMX_EXE_ARGS) {
|
||||
*ibc.idst ^= load64(getScratchpadAddress(ibc, scratchpad));
|
||||
}
|
||||
|
||||
static void exe_IROR_R(RANDOMX_EXE_ARGS) {
|
||||
*ibc.idst = rotr(*ibc.idst, *ibc.isrc & 63);
|
||||
}
|
||||
|
||||
static void exe_IROL_R(RANDOMX_EXE_ARGS) {
|
||||
*ibc.idst = rotl(*ibc.idst, *ibc.isrc & 63);
|
||||
}
|
||||
|
||||
static void exe_ISWAP_R(RANDOMX_EXE_ARGS) {
|
||||
int_reg_t temp = *ibc.isrc;
|
||||
*(int_reg_t*)ibc.isrc = *ibc.idst;
|
||||
*ibc.idst = temp;
|
||||
}
|
||||
|
||||
static void exe_FSWAP_R(RANDOMX_EXE_ARGS) {
|
||||
*ibc.fdst = rx_swap_vec_f128(*ibc.fdst);
|
||||
}
|
||||
|
||||
static void exe_FADD_R(RANDOMX_EXE_ARGS) {
|
||||
*ibc.fdst = rx_add_vec_f128(*ibc.fdst, *ibc.fsrc);
|
||||
}
|
||||
|
||||
static void exe_FADD_M(RANDOMX_EXE_ARGS) {
|
||||
rx_vec_f128 fsrc = rx_cvt_packed_int_vec_f128(getScratchpadAddress(ibc, scratchpad));
|
||||
*ibc.fdst = rx_add_vec_f128(*ibc.fdst, fsrc);
|
||||
}
|
||||
|
||||
static void exe_FSUB_R(RANDOMX_EXE_ARGS) {
|
||||
*ibc.fdst = rx_sub_vec_f128(*ibc.fdst, *ibc.fsrc);
|
||||
}
|
||||
|
||||
static void exe_FSUB_M(RANDOMX_EXE_ARGS) {
|
||||
rx_vec_f128 fsrc = rx_cvt_packed_int_vec_f128(getScratchpadAddress(ibc, scratchpad));
|
||||
*ibc.fdst = rx_sub_vec_f128(*ibc.fdst, fsrc);
|
||||
}
|
||||
|
||||
static void exe_FSCAL_R(RANDOMX_EXE_ARGS) {
|
||||
const rx_vec_f128 mask = rx_set1_vec_f128(0x80F0000000000000);
|
||||
*ibc.fdst = rx_xor_vec_f128(*ibc.fdst, mask);
|
||||
}
|
||||
|
||||
static void exe_FMUL_R(RANDOMX_EXE_ARGS) {
|
||||
*ibc.fdst = rx_mul_vec_f128(*ibc.fdst, *ibc.fsrc);
|
||||
}
|
||||
|
||||
static void exe_FDIV_M(RANDOMX_EXE_ARGS) {
|
||||
rx_vec_f128 fsrc = maskRegisterExponentMantissa(
|
||||
config,
|
||||
rx_cvt_packed_int_vec_f128(getScratchpadAddress(ibc, scratchpad))
|
||||
);
|
||||
*ibc.fdst = rx_div_vec_f128(*ibc.fdst, fsrc);
|
||||
}
|
||||
|
||||
static void exe_FSQRT_R(RANDOMX_EXE_ARGS) {
|
||||
*ibc.fdst = rx_sqrt_vec_f128(*ibc.fdst);
|
||||
}
|
||||
|
||||
static void exe_CBRANCH(RANDOMX_EXE_ARGS) {
|
||||
*ibc.idst += ibc.imm;
|
||||
if ((*ibc.idst & ibc.memMask) == 0) {
|
||||
pc = ibc.target;
|
||||
}
|
||||
}
|
||||
|
||||
static void exe_CFROUND(RANDOMX_EXE_ARGS) {
|
||||
rx_set_rounding_mode(rotr(*ibc.isrc, ibc.imm) % 4);
|
||||
}
|
||||
|
||||
static void exe_ISTORE(RANDOMX_EXE_ARGS) {
|
||||
store64(scratchpad + ((*ibc.idst + ibc.imm) & ibc.memMask), *ibc.isrc);
|
||||
}
|
||||
protected:
|
||||
static rx_vec_f128 maskRegisterExponentMantissa(ProgramConfiguration& config, rx_vec_f128 x) {
|
||||
const rx_vec_f128 xmantissaMask = rx_set_vec_f128(dynamicMantissaMask, dynamicMantissaMask);
|
||||
const rx_vec_f128 xexponentMask = rx_load_vec_f128((const double*)&config.eMask);
|
||||
x = rx_and_vec_f128(x, xmantissaMask);
|
||||
x = rx_or_vec_f128(x, xexponentMask);
|
||||
return x;
|
||||
}
|
||||
|
||||
private:
|
||||
static const int_reg_t zero;
|
||||
int registerUsage[RegistersCount];
|
||||
NativeRegisterFile* nreg;
|
||||
|
||||
static void* getScratchpadAddress(InstructionByteCode& ibc, uint8_t* scratchpad) {
|
||||
uint32_t addr = (*ibc.isrc + ibc.imm) & ibc.memMask;
|
||||
return scratchpad + addr;
|
||||
}
|
||||
|
||||
#ifdef RANDOMX_GEN_TABLE
|
||||
static InstructionGenBytecode genTable[256];
|
||||
|
||||
void gen_IADD_RS(RANDOMX_GEN_ARGS);
|
||||
void gen_IADD_M(RANDOMX_GEN_ARGS);
|
||||
void gen_ISUB_R(RANDOMX_GEN_ARGS);
|
||||
void gen_ISUB_M(RANDOMX_GEN_ARGS);
|
||||
void gen_IMUL_R(RANDOMX_GEN_ARGS);
|
||||
void gen_IMUL_M(RANDOMX_GEN_ARGS);
|
||||
void gen_IMULH_R(RANDOMX_GEN_ARGS);
|
||||
void gen_IMULH_M(RANDOMX_GEN_ARGS);
|
||||
void gen_ISMULH_R(RANDOMX_GEN_ARGS);
|
||||
void gen_ISMULH_M(RANDOMX_GEN_ARGS);
|
||||
void gen_IMUL_RCP(RANDOMX_GEN_ARGS);
|
||||
void gen_INEG_R(RANDOMX_GEN_ARGS);
|
||||
void gen_IXOR_R(RANDOMX_GEN_ARGS);
|
||||
void gen_IXOR_M(RANDOMX_GEN_ARGS);
|
||||
void gen_IROR_R(RANDOMX_GEN_ARGS);
|
||||
void gen_IROL_R(RANDOMX_GEN_ARGS);
|
||||
void gen_ISWAP_R(RANDOMX_GEN_ARGS);
|
||||
void gen_FSWAP_R(RANDOMX_GEN_ARGS);
|
||||
void gen_FADD_R(RANDOMX_GEN_ARGS);
|
||||
void gen_FADD_M(RANDOMX_GEN_ARGS);
|
||||
void gen_FSUB_R(RANDOMX_GEN_ARGS);
|
||||
void gen_FSUB_M(RANDOMX_GEN_ARGS);
|
||||
void gen_FSCAL_R(RANDOMX_GEN_ARGS);
|
||||
void gen_FMUL_R(RANDOMX_GEN_ARGS);
|
||||
void gen_FDIV_M(RANDOMX_GEN_ARGS);
|
||||
void gen_FSQRT_R(RANDOMX_GEN_ARGS);
|
||||
void gen_CBRANCH(RANDOMX_GEN_ARGS);
|
||||
void gen_CFROUND(RANDOMX_GEN_ARGS);
|
||||
void gen_ISTORE(RANDOMX_GEN_ARGS);
|
||||
void gen_NOP(RANDOMX_GEN_ARGS);
|
||||
#endif
|
||||
};
|
||||
}
|
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,132 @@
|
||||
<?xml version="1.0" encoding="utf-8"?>
|
||||
<Project DefaultTargets="Build" ToolsVersion="15.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
|
||||
<ItemGroup Label="ProjectConfigurations">
|
||||
<ProjectConfiguration Include="Debug|Win32">
|
||||
<Configuration>Debug</Configuration>
|
||||
<Platform>Win32</Platform>
|
||||
</ProjectConfiguration>
|
||||
<ProjectConfiguration Include="Release|Win32">
|
||||
<Configuration>Release</Configuration>
|
||||
<Platform>Win32</Platform>
|
||||
</ProjectConfiguration>
|
||||
<ProjectConfiguration Include="Debug|x64">
|
||||
<Configuration>Debug</Configuration>
|
||||
<Platform>x64</Platform>
|
||||
</ProjectConfiguration>
|
||||
<ProjectConfiguration Include="Release|x64">
|
||||
<Configuration>Release</Configuration>
|
||||
<Platform>x64</Platform>
|
||||
</ProjectConfiguration>
|
||||
</ItemGroup>
|
||||
<PropertyGroup Label="Globals">
|
||||
<VCProjectVersion>15.0</VCProjectVersion>
|
||||
<ProjectGuid>{41F3F4DF-8113-4029-9915-FDDC44C43D49}</ProjectGuid>
|
||||
<RootNamespace>tests</RootNamespace>
|
||||
<WindowsTargetPlatformVersion>10.0.17763.0</WindowsTargetPlatformVersion>
|
||||
<ProjectName>tests</ProjectName>
|
||||
</PropertyGroup>
|
||||
<Import Project="$(VCTargetsPath)\Microsoft.Cpp.Default.props" />
|
||||
<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'" Label="Configuration">
|
||||
<ConfigurationType>Application</ConfigurationType>
|
||||
<UseDebugLibraries>true</UseDebugLibraries>
|
||||
<PlatformToolset>v141</PlatformToolset>
|
||||
<CharacterSet>MultiByte</CharacterSet>
|
||||
</PropertyGroup>
|
||||
<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Release|Win32'" Label="Configuration">
|
||||
<ConfigurationType>Application</ConfigurationType>
|
||||
<UseDebugLibraries>false</UseDebugLibraries>
|
||||
<PlatformToolset>v141</PlatformToolset>
|
||||
<WholeProgramOptimization>true</WholeProgramOptimization>
|
||||
<CharacterSet>MultiByte</CharacterSet>
|
||||
</PropertyGroup>
|
||||
<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Debug|x64'" Label="Configuration">
|
||||
<ConfigurationType>Application</ConfigurationType>
|
||||
<UseDebugLibraries>true</UseDebugLibraries>
|
||||
<PlatformToolset>v141</PlatformToolset>
|
||||
<CharacterSet>MultiByte</CharacterSet>
|
||||
</PropertyGroup>
|
||||
<PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Release|x64'" Label="Configuration">
|
||||
<ConfigurationType>Application</ConfigurationType>
|
||||
<UseDebugLibraries>false</UseDebugLibraries>
|
||||
<PlatformToolset>v141</PlatformToolset>
|
||||
<WholeProgramOptimization>true</WholeProgramOptimization>
|
||||
<CharacterSet>MultiByte</CharacterSet>
|
||||
</PropertyGroup>
|
||||
<Import Project="$(VCTargetsPath)\Microsoft.Cpp.props" />
|
||||
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<Optimization>MaxSpeed</Optimization>
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<FunctionLevelLinking>true</FunctionLevelLinking>
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<SDLCheck>true</SDLCheck>
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<EnableCOMDATFolding>true</EnableCOMDATFolding>
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<Link>
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<EnableCOMDATFolding>true</EnableCOMDATFolding>
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<ClCompile Include="..\src\tests\tests.cpp" />
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<ItemGroup>
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<ProjectReference Include="randomx.vcxproj">
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<Project>{3346a4ad-c438-4324-8b77-47a16452954b}</Project>
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<ItemGroup>
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<ClInclude Include="..\src\tests\utility.hpp" />
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<Import Project="$(VCTargetsPath)\Microsoft.Cpp.targets" />
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<ImportGroup Label="ExtensionTargets">
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@ -0,0 +1,27 @@
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<UniqueIdentifier>{93995380-89BD-4b04-88EB-625FBE52EBFB}</UniqueIdentifier>
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<Extensions>h;hh;hpp;hxx;hm;inl;inc;ipp;xsd</Extensions>
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<ClInclude Include="..\src\tests\utility.hpp">
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|
Loading…
Reference in new issue